The present invention relates generally to signal interconnections between integrated circuit (I.C.) chips, and more particularly to optical interconnections of integrated circuits in multichip modules.
Modules that incorporates multiple computing chips are needed to realize advanced computers such as highly parallel computational systems that employ next generation Very Large Scale Integration (VLSI) computing chips. Such systems require highly dense connection networks that contain many increased length or "long distance" high speed intramodule connections. For successful system design it is important to reduce the area, power requirements, and time delay of these intramodule connections.
For example, next generation processor arrays typically include hundreds of chips. Given each chip containing 512 processing elements per chip, and each processing element requiring at least one increased length connection, a multichip module system capable of providing approximately 512 connections per chip is needed. Accordingly, a module containing 64 chips requires over 32,000 increased length intramodule connections. Such a large number of increased length intramodule connections can easily impede system performance unless the area, power requirements, and time delay of these intramodule connections is reduced.
In highly parallel systems that employ only conventional electrical connection technology, increased length intramodule electrical connections are responsible for a large share of a total power dissipation, time delay and surface area consumption of each system. To avoid such difficulties, intramodule connections longer that a specified length are characterized as increased length or "long distance" connections and are implemented using optical technology. By replacing increased length electrical intramodule connections with optical connections, a communications "bottle neck" is relieved. Such optical interconnects increase communication speed and reduce the volume, cross talk and power dissipation of increased length connections.
FIG. 1 is a cut away side view showing a previously known optical interconnection scheme. As shown the scheme includes a mirror 101 and a single contiguous large dimension holographic optical substrate 102 incorporating transmitter holograms 104 and receiver holograms 106. The scheme further includes Gallium Arsenide (GaAs) optical transmitter chips 108, and silicon Integrated Circuit (IC) chips 110. As shown in FIG. 1, both GaAs and silicon chips are mounted on a supporting substrate of a multichip module 112.
Each of the GaAs transmitter chips contains arrays of surface emitting lasers. A center to center spacing between adjacent lasers is approximately 300 microns in order to limit the power dissipation per unit area and to provide sufficient area to place a contact pad adjacent to each laser. This allows for a density of 1,000 lasers per one square centimeter on each GaAs chip. The silicon integrated circuit chips contain integrated optical detectors.
As shown in FIG. 1, thin film interconnects are formed on a surface of the substrate in areas between the chips. Transparent translator chips are mounted on top of the substrate in such a way that each translator chip is placed over a respective one of the silicon or GaAs chips. The translator chips contain no active devices, only conductive metal paths coupled to contact pads. The translator chips are used to route connections from the chips onto the thin film interconnects on the substrate surface. The scheme illustrated by FIG. 1 is similar to one discussed in an article "Holographic Optical Interconnects for Multichip Modules" by M. Feldman, Electronic Engineering Sept. 1992, pg. 49-53. Because the article provides helpful background information, it is hereby incorporated by reference.
The lasers of the transmitters are optically coupled to the optical detectors by employing the mirror 101 and the single contiguous large dimension optical substrate 102 having a plurality of holograms incorporated therein to form a double pass holographic arrangement. For example, as illustrated FIG. 1, light, L, from one of the lasers illuminates one of the transmitter holograms 104 of the large dimension holographic optical substrate 102. The transmitter hologram divides the laser light into a plurality of beams, so that each passes through a respective one of the receiver holograms after reflection off of the mirror 101. Each receiver hologram acts as a single lens and focuses the light beam onto a respective one of the optical detectors. Accordingly, in the previously known scheme illustrated in FIG. 1, the mirror and the large dimension holographic optical substrate are employed so that the beams follow optical paths between the lasers and detectors.
Though such previously known optical interconnection schemes provide some advantages, some problems still remain. In accordance with previously known schemes, constructing the optical interconnection apparatus shown in FIG. 1 involves a critical alignment step to align the single contiguous large dimension holographic optical substrate 102 with the supporting substrate 112 of the multichip module. Such alignment is achieved using a through-wafer I.C. mask aligner. Alignment problems such as registration run off are associated with I.C. mask aligners employed to align any holographic optical substrates having large dimensions, for example lateral dimensions of 10 centimeters by 10 centimeters. In general, as size of such substrates is increased, registration run off becomes worse. Resulting misalignment of the optical paths between the lasers and detectors impairs performance of the optical interconnections. Furthermore, even the largest conventional I.C. mask aligners are severely limited in their capability to handle substrates that are above a particular size. Since critical alignment of the large dimension holographic optical substrate with the supporting substrate is achieved using the through-wafer IC mask aligner, the capability of the I.C. mask aligner limits the size of substrates that can be aligned, and therefore limits the size and sophistication of multichip modules that can be assembled by optically interconnecting constituent I.C.'s.
What is needed is an optoelectronic apparatus for optically interconnecting integrated circuits that reduces optical path alignment difficulties and enhances signal quality. In particular, what is needed is an optical interconnection apparatus that is free from the registration run off associated with the large dimension holographic optical substrates of previously known optical interconnect schemes. Furthermore, the apparatus should surpass previously known limitations on the size and sophistication of multichip modules that can be assembled by optically interconnecting constituent I.C.'s.